we talk about the instruction set, so we talk about 32-bit vs 64-bit instructions. That’s how the terminology works.

I never denied that, what I denied was the ridiculous idea that Address bus was a meaningful measure. AMD64 is a 64 bit instruction set by definition, but a modern Ryzen CPU is so much more than just AMD64. And the same is true for the competition.
Originally an AMD64 CPU was single core single threaded. This is far from true today, so obviously since the CPU can handle multiple instructions on multiple cores, the "CPU Package" is also necessarily wider.

I have no idea what has gone wrong here? I'm not denying that a modern Intel or AMD or Arm CPU generally is called a 64 bit CPU.
I'm just stating that if they had to be measured by their actual capabilities, a modern Ryzen CPU for instance, is actually closer to being a 256 bit CPU, and that's per core!. In part due to technologies that make them able to execute several instructions in a single clock cycle, that operate on way wider busses than older CPU's, that encoded only a single thread per core.

But there can be absolutely no doubt that Address bus was NEVER used to determine the bit width of a CPU, that would simply be ridiculous, as it ONLY determines addressable RAM and nothing else.

All those chips you’re talking about were from >40 years ago. Times change.

Those easy to understand examples were only to show how claiming address bus can be a meaningful measure for the bit width of a CPU is ridiculous.

Also the AMD64 is only part of the instruction set of a modern Ryzen CPU, so although AMD64 definitely is a 64 bit instruction set, it only describes one part of the CPU. It also supports: x87, MMX, SSE, SSE2, SSE3, SSSE3, SSE4. 1, SSE4. 2, AES, CLMUL, AVX, AVX2, FMA3, CVT16/F16C, ABM, BMI1, BMI2, SHA.
Many of which have way wider instructions than 64 bit, AVX2 for instance supports 512 bit math.